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 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendor
AN 518: SGMII Interface Implementation Using Soft-CDR Mode of Altera FPGAs - Stratix V  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V13.0 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families  Design Example \ Outside Design StoreNon kit specific Cyclone IV Design ExamplesCyclone IV13.1.4 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families  Design Example \ Outside Design StoreNon kit specific Cyclone IV Design ExamplesCyclone IV15.0.0 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Arria 10  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1015.0.0 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Arria V  Design Example \ Outside Design StoreNon kit specific Arria V Design ExamplesArria V15.0.0 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Cyclone III  Design Example \ Outside Design StoreNon kit specific Cyclone III Design ExamplesCyclone III15.0.0 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Cyclone V  Design Example \ Outside Design StoreNon kit specific Cyclone V Design ExamplesCyclone V15.0.0 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Stratix III  Design Example \ Outside Design StoreNon Kit Specific Stratix III Design ExamplesStratix III15.0.0 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Stratix IV  Design Example \ Outside Design StoreNon Kit Specific Stratix IV Design ExamplesStratix IV15.0.0 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Stratix V  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V15.0.0 Intel
AN 558: Implementing Dynamic Reconfiguration in Arria II Devices  Design Example \ Outside Design StoreNon kit specific Arria II Design ExamplesArria II15.0.0 Intel
AN 609: Implementing Dynamic Reconfiguration in Cyclone IV GX Devices  Design Example \ Outside Design StoreCyclone IV GX Transceiver Development KitCyclone IV13.0 Intel
AN 630: Real-Time ISP and ISP Clamp for Altera MAX Series  Design Example \ Outside Design StoreNon Kit Specific MAX 10 Design ExamplesMAX 1014.0.0 Intel
AN 674: PROFINET IRT and Getting Started with The Siemens CPU 315 PLC  Design Example \ Outside Design StoreAltera DE2-115 Development and Education BoardCyclone IV13.0 Intel
AN 676: Using the Transceiver Reconfiguration Controller for Dynamic Reconfiguration in Arria V and Cyclone V Devices  Design Example \ Outside Design StoreNon kit specific Cyclone V Design ExamplesCyclone V15.0.0 Intel
AN 676: Using the Transceiver Reconfiguration Controller for Dynamic Reconfiguration in Arria V and Cyclone V Devices - Arria V  Design Example \ Outside Design StoreNon kit specific Arria V Design ExamplesArria V15.0.0 Intel
AN 677: Adding New Design Components to the PROFINET IP  Design Example \ Outside Design StoreAltera DE2-115 Development and Education BoardCyclone IV13.0 Intel
AN 680: Product Security Features for Altera Devices  Design Example \ Outside Design StoreNon kit specific Cyclone V Design ExamplesCyclone V15.1.0 Intel
AN 680: Product Security Features for Altera Devices  Design Example \ Outside Design StoreNon kit specific Cyclone V Design ExamplesCyclone V16.0.0 Intel
AN 680: Product Security Features for Altera Devices - Arria II  Design Example \ Outside Design StoreNon kit specific Arria II Design ExamplesArria II16.0.0 Intel