Design Store

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 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendorDownloads
  Cyclone IV GX Transceiver Baseline Pinout  Design ExampleCyclone IV GX Transceiver Development KitCyclone IV16.0.0 Intel37
  Cyclone V DE0 Development Board Baseline Pinout  Design ExampleDE0-CV Development BoardCyclone V16.0.0 Terasic35
  Cyclone V E FPGA Development Kit Baseline Pinout  Design ExampleCyclone V E FPGA Development Kit Cyclone V16.0.0 Intel33
  Cyclone V GT FPGA Development Kit Baseline Pinout  Design ExampleCyclone V GT FPGA Development KitCyclone V16.0.0 Intel34
  Cyclone V GX Starter Kit Baseline Pinout  Design ExampleCyclone V GX Starter KitCyclone V16.0.0 Intel75
  Cyclone V SoC DE10 - Standard Baseline Pinout  Design ExampleCyclone V SoC DE10 - StandardCyclone V16.0.0 Terasic99
  Cyclone V SOC Devkit Baseline Pinout  Design ExampleCyclone V SoC Development KitCyclone V16.0.0 Intel40
  Cyclone V SoCKit Baseline Pinout   Design ExampleCyclone V SoCKitCyclone V16.0.0 Arrow61
  Data Word Alignment Calibration Through Loopback Between Altera PHYLite for Parallel Interfaces Instances  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel8
  Data Word Alignment Calibration With Multiple Altera PHYLite for Parallel Interfaces IP Cores  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel20
  DC-DC Converter Control with ADSP Builder  Design ExampleBeMicro MAX 10 FPGA Evaluation KitMAX 1016.0.0 Present Power Systems, LLC49
  DDR3 with Board Test System Console  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0 Intel116
  DE0-Nano Baseline Pinout  Design ExampleDE0-Nano Development and Education BoardCyclone IV16.0.0 Terasic467
  DE1-SOC Board  Design ExampleDE1-SoC BoardCyclone V16.0.0 Intel183
  DE1-SOC Board Baseline Pinout  Design ExampleDE1-SoC BoardCyclone V16.0.0 Terasic83
  DE10-Nano Baseline Pinout  Design ExampleDE10-NanoCyclone V16.0.0 Intel125
  DE2-115 Baseline Pinout for Cypress USB PHY  Design ExampleAltera DE2-115 Development and Education BoardCyclone IV16.0.0 Terasic138
  DE2-115 Baseline Pinout for NXP USB PHY  Design ExampleAltera DE2-115 Development and Education BoardCyclone IV16.0.0 Terasic55
  DE2i-150 Rev B Baseline Pinout  Design ExampleDE2i-150 FPGA Development KitCyclone IV16.0.0 Terasic16
  DE2i-150 Rev C Baseline Pinout  Design ExampleDE2i-150 FPGA Development KitCyclone IV16.0.0 Terasic17