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 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendor
  ADC example for use with Board Test System Monitor Panel  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0 Intel
  ADC example for use with Board Test System Monitor Panel  Design ExampleMAX 10 FPGA Development KitMAX 1017.1std.1 StandardIntel
  ADC RTL - MAX10 DE10 Lite  Design ExampleMAX 10 DE10 - LiteMAX 1015.1.0 Intel
  ADC_MIC_LCD  Design ExampleMAX 10 NEEKMAX 1015.0.0 Terasic
  ADC_MIC_LCD  Design ExampleMAX 10 NEEKMAX 1015.1.0 Terasic
  ADC_MIC_LCD  Design ExampleMAX 10 NEEKMAX 1016.0.0 Terasic
  Agilex I/O PLL Reconfiguration  Design ExampleAgilex F-Series Transceiver-SoC Development KitAgilex19.4.0 ProIntel
  Agilex Mailbox Client Intel FPGA IP Core Design Example(QSPI flash Access and Remote System Update)  Design ExampleAgilex F-Series Transceiver-SoC Development KitAgilex19.3.0 ProIntel
  Altera PHYLite for Parallel Interfaces Loopback Simulation Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1015.1.0 Intel
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1015.1.0 Intel
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1016.1.0 Intel
Altera Triple-Speed Ethernet Timing Contraints Design Example (Multi-core)  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V12.0 Intel
  Altera-Lime Connectivity and DUC/DDC Design Example  Design ExampleLime Microsystems Stream BoardCyclone IV14.1.0 Intel
  Altera-Lime Connectivity and DUC/DDC Design Example  Design ExampleLime Microsystems Stream BoardCyclone IV15.0.0 Intel
AN 307: Altera Design Flow for Xilinx Users  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V12.1 Intel
AN 307: Altera Design Flow for Xilinx Users - Arria 10  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1012.1 Intel
AN 307: Altera Design Flow for Xilinx Users - Arria V  Design Example \ Outside Design StoreNon kit specific Arria V Design ExamplesArria V12.1 Intel
AN 307: Altera Design Flow for Xilinx Users - Cyclone IV  Design Example \ Outside Design StoreNon kit specific Cyclone IV Design ExamplesCyclone IV12.1 Intel
AN 307: Altera Design Flow for Xilinx Users - Cyclone V  Design Example \ Outside Design StoreNon kit specific Cyclone V Design ExamplesCyclone V12.1 Intel