Design Store


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 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendor
  12G-SDI Audio Reference Design  Design ExampleArria 10 SoC Development KitArria 1020.1.0 ProIntel
1G/10GbE and 10GBASE-KR PHY Design Specifications  Design Example \ Outside Design StoreArria 10 GX FPGA Development KitArria 1015.1 Intel
  Altera PHYLite for Parallel Interfaces Loopback Simulation Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1015.1.0 Intel
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1015.1.0 Intel
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1016.1.0 Intel
AN 307: Altera Design Flow for Xilinx Users - Arria 10  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1012.1 Intel
AN 456: PCI Express High Performance Reference Design for Arria 10  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1014.0.0 Intel
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Arria 10  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1015.0.0 Intel
AN 701: Scalable Low Latency Ethernet 10G MAC using Arria 10 1G/10G PHY  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1015.0.0 Intel
AN 720: Simulating the ASMI Block in Your Design for Arria 10 Device  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1014.0.0 Intel
AN 723: Serial Digital Interface (SDI) II Implementation  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1014.0.0 Intel
AN 728: I/O PLL Reconfiguration and Dynamic Phase Shift for Arria 10 Devices  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1015.0.0 Intel
AN 729: Implementing JESD204B IP Core System Reference Design with Nios II Processor As Control Unit  Design ExampleArria 10 GX FPGA Development KitArria 1015.0.0 Intel
AN 747: Altera PHYLite for Parallel Interfaces Loopback Reference Designs Application Note  Design Example \ Outside Design StoreArria 10 GX FPGA Development KitArria 1015.0.0 Intel
AN 755: Implementing JESD204B IP Core System Reference Design with ARM HPS As Control Unit (Baremetal Flow)  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1015.0.0 Intel
AN 757: 1G/2.5G Ethernet Design Examples  Design Example \ Outside Design StoreArria 10 GX Transceiver Signal Integrity Development KitArria 1015.0.0 Intel
  AN 887: PHY Lite for Parallel Interface Reference Design with Dynamic Reconfiguration for Intel® Arria® 10 Devices  Design ExampleArria 10 GX FPGA Development KitArria 1019.1.0 ProIntel
AN647: Single-Port Triple-Speed Ethernet and On-Board PHY Chip Reference Design - Arria 10  Design Example \ Outside Design StoreArria 10 GX FPGA Development KitArria 1015.0.0 Intel
  AN690: PCIe Gen3x8 AVMM DMA (Avalon Memory-Mapped with Direct Memory Access)  Design ExampleArria 10 GX FPGA Development KitArria 1016.1.0 Intel