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D/AVE Graphics Accelerator Demo From TES  


CategoryDesign Example \ Outside Design Store
Name D/AVE Graphics Accelerator Demo From TES
DescriptionThe D/AVE 2D is an Altera® SOPC Builder and VHDL register transfer level (RTL) intellectual property (IP) developed for sophisticated vector-based graphic applications. D/AVE fits perfectly into the requirements of embedded systems.
Operating SystemNone
IP Core
IP CoreHeading
Version1.0
FamilyCyclone III
DeviceEP3C25
Documentation
DocumentDescription
D/AVE Graphics Accelerator Demo From TES-
Development KitNios II Embedded Evaluation Kit (NEEK), Cyclone III Edition
Quartus Prime VersionDownload Quartus Prime v9.1
Quartus Prime EditionStandard
VendorTES Electronic Solutions


Last updated on Feb. 26, 2016, 4:57 p.m.