|Design Example \ Outside Design Store|
| Nios II Low-Power Design Example - Nios II Embedded Evaluation Kit, Cyclone III Edition|
|This low-power design example demonstrates how to use the Nios® II C-to-Hardware (C2H) acceleration compiler to help reduce dynamic power consumption in an FPGA-based embedded design. The example computes the Mandelbrot fractal pattern using different numbers of hardware accelerators to measure the effects on power consumption and total system throughput.|
The design example runs on the economical Cyclone® III FPGA Starter Kit.
|Nios II Embedded Evaluation Kit (NEEK), Cyclone III Edition|
|Download Quartus Prime v8.0|