Design Store


Agilex I/O PLL Reconfiguration  


CategoryDesign Example
NameAgilex I/O PLL Reconfiguration
DescriptionThis design example uses a AGFB014R24A2E3VR0 device to demonstrate the implementation of the following three different I/O PLL reconfiguration option using the IOPLL Reconfig IP core.
• .mif streaming
• Advanced mode
• Clock gating
This design example consists of the IOPLL IP core, IOPLL Reconfig IP core, In-
System Sources & Probes Intel FPGA IP core and Reset Release Intel FPGA IP.
Operating SystemOther
IP Core
IP CoreHeading
Altera IOPLL ReconfigPLL
Top level generated instrumentation fabricDebug & Performance
Altera SignalTap II AgentDebug and Performance
Altera IOPLLClocksPLLsResets
Altera In-System Sources & ProbesSimulationDebugVerification
Version1
FamilyAgilex
DeviceAGFA014_R0
Documentation
DocumentDescription
Agilex Clocking and PLL User GuideThe Agilex Clocking and PLL User Guide section 6.6 documents the use of this design example.
Development KitAgilex F-Series Transceiver-SoC Development Kit
Installation Package

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.

The second means to bring up the project template is through the New Project Wizard (File -> New Project Wizard). After entering the project name and folder on the first panel, the second panel will ask you to specify an empty project or project template. Select project template. You will see a list of Design Templates projects that you have loaded prior as well as various "Baseline Pinout Designs" that contain the pinout and settings for a variety of development kits. If you don't see your design template in the list, click on the link that states install the Design Templates circled below:


Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.

Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.

At the command-line, type the following command:

quartus_sh --platform_install –package <project directory>/iopll-reconfig.par

Once the process completes, then type:

quartus_sh --platform –name iopll-reconfig

Download   (The download link will expire on Dec. 5, 2021, 10:19 a.m., please refresh the page to get a new link.)
Quartus Prime VersionDownload Quartus Prime v19.4
Quartus Prime EditionPro
VendorIntel


Last updated on April 28, 2020, 6:20 p.m.