Design Store

Intel Cyclone 10 LP FPGA Triple-Speed Ethernet and Intel On-Board PHY Chip Reference Design   

CategoryDesign Example
NameIntel Cyclone 10 LP FPGA Triple-Speed Ethernet and Intel On-Board PHY Chip Reference Design
DescriptionThe Intel® FPGA Triple-Speed Ethernet and Intel® on-board PHY chip reference design demonstrates Ethernet operation between the Triple-Speed Ethernet IP core and onboard Intel XWAY PHY11G Gigabit PHY chip in Intel Cyclone 10 LP FPGA Evaluation Kit.
Operating SystemOther
IP Core
IP CoreHeading
FamilyCyclone 10 LP
Intel Cyclone 10 LP FPGA Triple-Speed Ethernet and On-Board Intel PHY Chip Reference Design User ManualThis is the user manual for Intel Cyclone 10 LP FPGA Triple-Speed Ethernet and Intel On-Board PHY Chip Reference Design. The user manual contains details information of the reference design including design overview, functional description and hardware test procedure.
Development KitCyclone 10 LP FPGA Evaluation Kit
Installation Package

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.

The second means to bring up the project template is through the New Project Wizard (File -> New Project Wizard). After entering the project name and folder on the first panel, the second panel will ask you to specify an empty project or project template. Select project template. You will see a list of Design Templates projects that you have loaded prior as well as various "Baseline Pinout Designs" that contain the pinout and settings for a variety of development kits. If you don't see your design template in the list, click on the link that states install the Design Templates circled below:

Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.

Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.

At the command-line, type the following command:

quartus_sh --platform_install –package <project directory>/C10LP_TSE_RGMII_DESIGN.par

Once the process completes, then type:

quartus_sh --platform –name C10LP_TSE_RGMII_DESIGN

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Quartus Prime VersionDownload Quartus Prime v18.0
Quartus Prime EditionStandard

Last updated on Dec. 5, 2018, 3:29 p.m.