|Name||FIFO V FIFO2 Simulation|
|Description|| Intel Stratix® 10 offers two options for FIFO IP - FIFO and FIFO2. FIFO is identical in other device families while FIFO2 is specifically designed with Intel® HyperFlex™ architecture in mind, and targeted for high speed design. (Please refer to Stratix 10 Embedded Memory User Guide for FIFO2 specification)|
Due to its pipelined structure, FIFO2 has different latency compared to FIFO IP. This design is to show difference between FIFO and FIFO2 in reset scheme and read/write operations.
-No development kit required
-Use Quartus Prime 18.0 and ModelSim
-The package contains a project which included source file: a top level RTL, a testbench file, and a sim_top.tcl to be sourced in ModelSim to run simulation.
|Development Kit||Stratix 10 GX FPGA Development Kit|
Download (The download link will expire on Sept. 20, 2021, 10:49 p.m., please refresh the page to get a new link.)
Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.
Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.
Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.
At the command-line, type the following command:
Once the process completes, then type:
|Quartus Prime Version||Download Quartus Prime v18.0|
|Quartus Prime Edition||Pro|
Last updated on Dec. 14, 2018, 9:12 a.m.