Design Store


Cyclone 10 GX PCIe Gen1 x1 Avl-ST  


CategoryDesign Example
NameCyclone 10 GX PCIe Gen1 x1 Avl-ST
DescriptionThis design example highlights the performance of the Altera’s PCI Express® products. It includes a high-performance chaining direct memory access (DMA) that transfers data between the a PCIe Endpoint in the FPGA, internal memory and the system memory. The design package includes a Windows-based software application that sets up the DMA transfers. The software application also measures and displays the performance achieved for the transfers. This reference design enables you to evaluate the performance of the PCI Express protocol in Cyclone 10 GX device.
Operating SystemNone
IP Core
IP CoreHeading
Example : Arria 10 Application for Avalon-Streaming Hard IP for PCI ExpressQSYS Example Designs
Arria 10 Hard IP for PCI ExpressPCIExpress
Arria 10 FPLLClocksPLLsResets
Arria 10 Transceiver Native PHYTransceiverPHY
Version18.0
FamilyCyclone 10 GX
Device10CX220
Documentation
DocumentDescription
PCI Express High Performance Reference Design for Cyclone 10 GXPCI Express High Performance Reference Design for Cyclone 10 GX User Guide
Development KitCyclone 10 GX FPGA Development Kit
Installation Package

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.

The second means to bring up the project template is through the New Project Wizard (File -> New Project Wizard). After entering the project name and folder on the first panel, the second panel will ask you to specify an empty project or project template. Select project template. You will see a list of Design Templates projects that you have loaded prior as well as various "Baseline Pinout Designs" that contain the pinout and settings for a variety of development kits. If you don't see your design template in the list, click on the link that states install the Design Templates circled below:


Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.

Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.

At the command-line, type the following command:

quartus_sh --platform_install –package <project directory>/Cyclone10GX_PCIeGen1x1_AVST_18_0.par

Once the process completes, then type:

quartus_sh --platform –name Cyclone10GX_PCIeGen1x1_AVST_18_0

Download   (The download link will expire on Feb. 28, 2021, 3:40 p.m., please refresh the page to get a new link.)
Quartus Prime VersionDownload Quartus Prime v18.0
Quartus Prime EditionPro
VendorIntel


Last updated on June 20, 2018, 4 a.m.