Design Store


Arria 10 Nios II Simple Socket Server Design Example  


CategoryDesign Example
NameArria 10 Nios II Simple Socket Server Design Example
DescriptionThis design example shows a socket server using the NicheStack TCP/IP stack-Nios® II Edition on MicroC/OS-II on a Arria 10 SoC development board. The server implements simple commands to control board LEDs through a separate MicroC/OS-II task.
Operating SystemNone
IP Core
IP CoreHeading
Top level generated instrumentation fabricDebug & Performance
Altera Arria 10 XCVR Reset SequencerOther
Avalon-ST AdapterQsysInterconnect
Avalon-ST Timing AdapterQsysInterconnect
Nios II Gen2 ProcessorNiosII
On-Chip Memory (RAM or ROM)OnChipMemory
IRQ MapperQsysInterconnect
JTAG UARTConfigurationProgramming
PIO (Parallel I/O)Other
MM InterconnectQsysInterconnect
Avalon-ST Error AdapterQsysInterconnect
Memory-Mapped DemultiplexerQsysInterconnect
Memory-Mapped MultiplexerQsysInterconnect
Avalon-MM Master AgentQsysInterconnect
Memory-Mapped Traffic LimiterQsysInterconnect
Avalon-MM Master TranslatorQsysInterconnect
Avalon-MM Slave AgentQsysInterconnect
Avalon-ST Single Clock FIFOQsysInterconnect
Avalon-MM Slave TranslatorQsysInterconnect
Memory-Mapped RouterQsysInterconnect
Reset ControllerQsysInterconnect
Interval TimerPeripherals
System ID PeripheralOther
Modular Scatter-Gather DMABridgesAndAdaptors
Modular SGDMA DispatcherBridgesAndAdaptors
Modular SGDMA PrefetchermSGDMA Sub-core
Write MasterQsysInterconnect
Read MasterQsysInterconnect
Triple-Speed EthernetEthernet
Arria 10 Transceiver Native PHYTransceiverPHY
Arria 10 Transceiver ATX PLLTransceiverPLL
Version17.1
FamilyArria 10
Device10AS066
Documentation
DocumentDescription
Nios II Simple Socket Server on A10 SoC Development KitUser guide for Arria 10 Nios II Simple Socket Server Design Example
Development KitArria 10 SoC Development Kit
Installation Package

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.

The second means to bring up the project template is through the New Project Wizard (File -> New Project Wizard). After entering the project name and folder on the first panel, the second panel will ask you to specify an empty project or project template. Select project template. You will see a list of Design Templates projects that you have loaded prior as well as various "Baseline Pinout Designs" that contain the pinout and settings for a variety of development kits. If you don't see your design template in the list, click on the link that states install the Design Templates circled below:


Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.

Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.

At the command-line, type the following command:

quartus_sh --platform_install –package <project directory>/a10_sss_171.par

Once the process completes, then type:

quartus_sh --platform –name a10_sss_171

Download   (The download link will expire on Sept. 21, 2021, 12:11 a.m., please refresh the page to get a new link.)
Quartus Prime VersionDownload Quartus Prime v17.1
Quartus Prime EditionPro
VendorIntel


Last updated on Aug. 19, 2018, 6:58 p.m.