|Name||Multi-Core NIOS II Processors Reference Design Based on Arria 10 SOC Development Board|
|Description||This design demonstrates the features of the Intel® Nios® II processor and Qsys system integration tool that are useful for creating systems with multiple processors. This short abstract provides some details on a reference design objectives and architecture. Using Qsys, we build a multiprocessor system containing four processors. Each processor is in a subsystem, creating a hierarchy with four subsystems with a separate memory map, coordinated with pipeline bridges.|
Multiprocessor systems possess the benefit of increased performance, but nearly always at the price of significantly increased system complexity for both hardware and software. The idea of using multiple processors to perform different tasks and functions on different processors in real-time embedded applications is gaining popularity. Intel FPGAs provide an ideal platform for developing embedded multiprocessor systems, since the hardware can easily be modified and tuned using Qsys tool to provide optimal system performance. Increases in the size of FPGAs make possible system designs with many Nios II processors on a single chip. Furthermore, with a powerful integration tool like Qsys, different system configurations can be designed, built, and evaluated very quickly. Qsys enables hierarchical designs, reducing system complexity through compartmentalization of the design into discrete subsystems. Each subsystem exports user-defined interfaces, linking the subsystem hierarchy together.
|Development Kit||Arria 10 SoC Development Kit|
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|Quartus Prime Version||Download Quartus Prime v17.0|
|Quartus Prime Edition||Standard|
Last updated on June 22, 2018, 2:11 a.m.