Design Store

Avalon Verification IP Suite(Two Avalon-MM Master and Slave Pair)  

CategoryDesign Example
NameAvalon Verification IP Suite(Two Avalon-MM Master and Slave Pair)
DescriptionThe Avalon® Verification IP Suite provides bus functional models (BFMs) to simulate the behavior of various Avalon interfaces. It also provides monitors to verify Avalon protocols. This suite facilitates the verification of intellectual property (IP) that includes Avalon interfaces.
Operating SystemNone
IP Core
IP CoreHeading
Altera Avalon-MM Master BFMSimulation
MM InterconnectQsysInterconnect
Avalon-ST AdapterQsysInterconnect
Avalon-ST Error AdapterQsysInterconnect
Memory-Mapped DemultiplexerQsysInterconnect
Memory-Mapped MultiplexerQsysInterconnect
Avalon-MM Master AgentQsysInterconnect
Memory-Mapped Traffic LimiterQsysInterconnect
Avalon-MM Master TranslatorQsysInterconnect
Memory-Mapped RouterQsysInterconnect
Avalon-MM Slave AgentQsysInterconnect
Avalon-ST Single Clock FIFOQsysInterconnect
Avalon-MM Slave TranslatorQsysInterconnect
Altera Avalon-MM Slave BFMSimulation
FamilyCyclone 10 LP
Avalon Verification IP Suite Design Example (Verilog HDL)-
Development KitCyclone 10 LP FPGA Evaluation Kit
Installation Package

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.

The second means to bring up the project template is through the New Project Wizard (File -> New Project Wizard). After entering the project name and folder on the first panel, the second panel will ask you to specify an empty project or project template. Select project template. You will see a list of Design Templates projects that you have loaded prior as well as various "Baseline Pinout Designs" that contain the pinout and settings for a variety of development kits. If you don't see your design template in the list, click on the link that states install the Design Templates circled below:

Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.

Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.

At the command-line, type the following command:

quartus_sh --platform_install –package <project directory>/avlmm_2x2.par

Once the process completes, then type:

quartus_sh --platform –name avlmm_2x2

Download   (The download link will expire on Dec. 5, 2021, 10:20 a.m., please refresh the page to get a new link.)
Quartus Prime VersionDownload Quartus Prime v17.0
Quartus Prime EditionStandard

Last updated on Oct. 10, 2018, 2:03 p.m.