|Name||AN690: PCIe Gen3x8 AVMM DMA with On-Chip Memory|
|Description||PCIe Reference Design using Avalon Memory-Mapped with Direct Memory Access|
Fast and easy to develop high performance PCIe Gen1x8 and Gen3x8 hardware
Example system is in the attached Quartus archive, which provides a pre-configured Qsys system
Includes 64-bit Windows and Linux driver and application that works with the example design
Example design throughput averaged across 8 kBytes transfer with descriptors overhead
Read/Write : up to *6.4GB/sec* per direction
Simultaneous read/write : *11.5GB/sec*
Preliminary release in ACDS 16.0.2, Arria 10 ES3 Silicon and Production Silicon
Altera PCI Express Arria 10 Development kit with 10AX115S2F45I1SG
A system with either 32-bit or 64-bit Linux or 64-bit Windows 7 installed
Date and Time error while compiling the linux driver
error: macro "__DATE__" might prevent reproducible builds [-Werror=date-time]
error: macro "__TIME__" might prevent reproducible builds [-Werror=date-time]
solution: turn off the the date-time error by adding the following line to the Makefile, after the line containing the "CPPFLAGS +=" :
ccflags-y += "-Wno-date-time"
|Development Kit||Arria 10 GX FPGA Development Kit|
Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.
Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.
Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.
At the command-line, type the following command:
Once the process completes, then type:
|Total Downloads||100 (From 27 Jun 2017 to 19 Aug 2019)|
|Quartus Prime Version||Download Quartus Prime v16.0|
|Quartus Prime Edition||Standard|
Last updated on June 22, 2018, 2:11 a.m.