|Design Example \ Outside Design Store|
| JPEG Decoder Design Example (OpenCL)|
|This design example implements a high-performance JPEG decoder using Open Computing Language (OpenCLTM). The solution consists of several OpenCL kernels connected via Altera’s channels vendor extension, where each kernel performs one step in the JPEG decoding pipeline (e.g. Huffman decoding, inverse DCT).|
This implementation can decode JPEG images at a rate of 2.6 MBps, which enables saturation of a PCI Express® (PCIe®) Gen2x8 link for transferring the decoded image back to the host memory.
|Non kit specific Stratix V Design Examples|
|Download Quartus Prime v16.0|