|Name||Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design|
|Description||This is PHYLite hardware reference design that is targeting Arria 10 FPGA Development kit. The reference design provides the ability to perform dynamic reconfiguration to the PHYLite IP cores using Nios II soft|
processor in a loopback system.
|Development Kit||Arria 10 GX FPGA Development Kit|
Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.
Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.
Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.
At the command-line, type the following command:
Once the process completes, then type:
|Total Downloads||63 (From 16 May 2016 to 19 Aug 2019)|
|Quartus Prime Version||Download Quartus Prime v16.0|
|Quartus Prime Edition||Standard|
Last updated on May 16, 2016, 10:14 a.m.