Triple Rate SDI II Quad Instance Simulation/Compilation Design Example
Design Example \ Outside Design Store |
Triple Rate SDI II Quad Instance Simulation/Compilation Design Example |
This design example shows how multiple SDI II IP Cores are instantiated. Because the Reconfiguration Router Altera provided is complicated, this design example directly connects the reconfiguration interface bypassing the Reconfiguration Router. Another benefit of using this design is that you can open and edit the IP Cores in the design by IP parameter editor unlike SDI II's standard design example. |
None |
|
1.0 |
Stratix V |
5SGSED6 |
|
Non kit specific Stratix V Design Examples |
Download Quartus Prime v15.1 |
Standard |
Intel |
Last updated on Aug. 20, 2020, 5:50 p.m.