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Triple Rate SDI II Quad Instance Simulation/Compilation Design Example  


CategoryDesign Example \ Outside Design Store
NameTriple Rate SDI II Quad Instance Simulation/Compilation Design Example
DescriptionThis design example shows how multiple SDI II IP Cores are instantiated. Because the Reconfiguration Router Altera provided is complicated, this design example directly connects the reconfiguration interface bypassing the Reconfiguration Router. Another benefit of using this design is that you can open and edit the IP Cores in the design by IP parameter editor unlike SDI II's standard design example.
Operating SystemNone
IP Core
IP CoreHeading
Version1.0
FamilyStratix V
Device5SGSED6
Documentation
DocumentDescription
Triple Rate SDI II Quad Instance Simulation/Compilation Design ExampleInterfaces
Development KitNon kit specific Stratix V Design Examples
Quartus Prime VersionDownload Quartus Prime v15.1
Quartus Prime EditionStandard
VendorIntel


Last updated on Aug. 20, 2020, 5:50 p.m.