Design Store


Max10 LPDDR2 design with debug feature  


CategoryDesign Example
NameMax10 LPDDR2 design with debug feature
DescriptionLPDDR2 design example for Max10 FPGA 10M50 evaluation kit.
Design is with signaltap showing External Memory Interface debug signals for Max10 FPGA
Operating SystemNone
IP Core
IP CoreHeading
LPDDR2 SDRAM Controller with UniPHYExternalMemoryInterfaces
Altera LPDDR2 Nextgen Memory ControllerExternalMemoryInterfaces
Altera Nextgen Memory Controller MM-ST AdapterExternalMemoryInterfaces
Altera LPDDR2 Nextgen Memory Controller CoreExternalMemoryInterfaces
Altera LPDDR2 AFI MultiplexerExternalMemoryInterfaces
LPDDR2 SDRAM External Memory PHYExternalMemoryInterfaces
LPDDR2 SDRAM External Memory PLL/DLL/OCT blockExternalMemoryInterfaces
LPDDR2 SDRAM Qsys SequencerExternalMemoryInterfaces
Avalon-MM Master TranslatorQsysInterconnect
Avalon-MM Slave TranslatorQsysInterconnect
MM InterconnectQsysInterconnect
Avalon-MM Traffic Generator and BIST EngineQsysInterconnect
Traffic Generator and BIST Engine CoreSimulationDebugVerification
Reset ControllerQsysInterconnect
Version15.1.2
FamilyMAX 10
Device10M50DA
Documentation
DocumentDescription
LPDDR2_x16_with_EMIF_Debug_FeatureLPDDR2 design example for Max10 FPGA 10M50 evaluation kit. Steps on guiding user to implement their own design using the pre_design files. Design is with signaltap showing debug signals of Max10 EMIF
Development KitMAX 10 FPGA 10M50 Evaluation Kit
Installation Package

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. In releases 16.0 or newer, you can simply double click on the <project>.par file and Quartus will launch that project.

The second means to bring up the project template is through the New Project Wizard (File -> New Project Wizard). After entering the project name and folder on the first panel, the second panel will ask you to specify an empty project or project template. Select project template. You will see a list of Design Templates projects that you have loaded prior as well as various "Baseline Pinout Designs" that contain the pinout and settings for a variety of development kits. If you don't see your design template in the list, click on the link that states install the Design Templates circled below:


Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.

Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.

At the command-line, type the following command:

quartus_sh --platform_install –package <project directory>/myplatform.par

Once the process completes, then type:

quartus_sh --platform –name myplatform

Download   (The download link will expire on Feb. 28, 2021, 3:16 p.m., please refresh the page to get a new link.)
Quartus Prime VersionDownload Quartus Prime v15.1
Quartus Prime EditionStandard
VendorIntel


Last updated on April 7, 2016, 9:48 a.m.