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AN 558: Implementing Dynamic Reconfiguration in Arria II Devices  


CategoryDesign Example \ Outside Design Store
NameAN 558: Implementing Dynamic Reconfiguration in Arria II Devices
DescriptionThis application note describes how to use the dynamic reconfiguration feature and why you may want use this feature to reconfigure your Arria® II transceivers. It describes the four dynamic reconfiguration modes—offset cancellation for receiver channels, analog control, data rate division in transmitter (TX), and channel and TX PLL select/reconfig. The application note also describes the dynamic reconfiguration ports available in the ALTGX_RECONFIG instance and the FPGA fabric-transceiver channel interface signals.
Operating SystemNone
IP Core
IP CoreHeading
Version1.0
FamilyArria II
DeviceEP2AGX125
Documentation
DocumentDescription
Document-
Development KitNon kit specific Arria II Design Examples
Quartus Prime VersionDownload Quartus Prime v15.0
Quartus Prime EditionStandard
VendorIntel


Last updated on June 13, 2016, 7:59 p.m.