Design Store


AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families  


CategoryDesign Example \ Outside Design Store
NameAN 522: Implementing Bus LVDS Interface in Supported Altera Device Families
DescriptionBus LVDS (BLVDS) extends the capability of LVDS point-to-point communication to multipoint configuration. Multipoint BLVDS offers an efficient solution for multipoint backplane applications. A good multipoint design must consider the capacitive load and termination on the bus to obtain better signal integrity. You can minimize the load capacitance by selecting a transceiver with low pin capacitance, connector with low capacitance, and keeping the stub length short. You can implement the BLVDS interface in supported Altera® device families: • Arria® 10, Arria V, and Arria II devices • Cyclone® V, Cyclone IV, Cyclone III, and Cylone III LS devices • Stratix® V, Stratix IV, and Stratix III devices The programmable features of the drive strength and slew rate options in these devices enable you to customize your multipoint system for maximum performance. To determine the maximum data rate supported, you must perform a simulation or measurement based on your specific system setup and application. You can use the included Cyclone III BLVDS design example to analyze the performance of a multipoint application. The design example is applicable to all supported Altera devices. For Arria 10 devices, you need to migrate the design example to Arria 10 devices first before you can use it.
Operating SystemNone
IP Core
IP CoreHeading
Version1.0
FamilyCyclone IV
DeviceEP4CE10
Documentation
DocumentDescription
Document-
Development KitNon kit specific Cyclone IV Design Examples
Quartus Prime VersionDownload Quartus Prime v13.1
Quartus Prime EditionStandard
VendorIntel


Last updated on Oct. 19, 2016, 8:56 p.m.