HiSPi (High-Speed Pixel Interface) Imager Connectivity Design Example
|Design Example \ Outside Design Store|
|HiSPi (High-Speed Pixel Interface) Imager Connectivity Design Example|
|The High-Speed Pixel Interface (HiSPi) design example demonstrates the use of an Altera® Cyclone® V FPGA to capture streaming video from an Aptina HiSPi serial interface. The FPGA receives the pixel data from the imager.|
|Cyclone V E FPGA Development Kit |
|Download Quartus Prime v12.1|
Last updated on Feb. 26, 2016, 3:37 p.m.