Design Store


XAUI  


CategoryDesign Example \ Outside Design Store
NameXAUI
DescriptionThis design implements the following blocks:
XAUI PHY IP
Transceiver Reconfiguration Controller
PRBS Generator
PRBS Checker
Avalon Memory-Mapped (MM) Master
Operating SystemNone
IP Core
IP CoreHeading
Version1.0
FamilyStratix V
Device5SGXEA7
Documentation
DocumentDescription
XAUITransceivers
Development KitStratix V GX FPGA Development Kit
Quartus Prime VersionDownload Quartus Prime v11.0
Quartus Prime EditionStandard
VendorIntel


Last updated on June 22, 2018, 1:56 a.m.