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Nios II Custom Instruction Design Example - Stratix IV GX FPGA Development Kit  


CategoryDesign Example \ Outside Design Store
Name Nios II Custom Instruction Design Example - Stratix IV GX FPGA Development Kit
DescriptionThis design example shows how to implement the cyclic redundancy check (CRC) algorithm as a Nios® II custom instruction. The CRC algorithm detects the corruption of data during transmission. The CRC calculation consists of an iterative algorithm involving XOR and shift operations. These operations are carried out concurrently in hardware and iteratively in software. Since the operations are carried out concurrently, the execution is much faster in hardware. This example demonstrates the way to implement an extended multi-cycle Nios II custom instruction.
Operating SystemBareMetal
IP Core
IP CoreHeading
Version1.0
FamilyStratix IV
DeviceEP4SGX230
Documentation
DocumentDescription
Nios II Custom Instruction Design Example-
Development KitStratix IV GX FPGA Development Kit
Quartus Prime VersionDownload Quartus Prime v11.0
Quartus Prime EditionStandard
VendorIntel


Last updated on Feb. 16, 2016, 10:32 p.m.