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Nios II Low-Power Design Example - Embedded Systems Development Kit, Cyclone III Edition  


CategoryDesign Example \ Outside Design Store
Name Nios II Low-Power Design Example - Embedded Systems Development Kit, Cyclone III Edition
DescriptionThis low-power design example demonstrates how to use the Nios® II C-to-Hardware (C2H) acceleration compiler to help reduce dynamic power consumption in an FPGA-based embedded design. The example computes the Mandelbrot fractal pattern using different numbers of hardware accelerators to measure the effects on power consumption and total system throughput.

The design example runs on the economical Cyclone® III FPGA Starter Kit.
Operating SystemBareMetal
IP Core
IP CoreHeading
Version1.0
FamilyCyclone III
DeviceEP3C120
Documentation
DocumentDescription
Nios II Low-Power Design Example-
Development Kit Altera Embedded Systems Development Kit, Cyclone III Edition
Quartus Prime VersionDownload Quartus Prime v10.0
Quartus Prime EditionStandard
VendorIntel


Last updated on March 2, 2016, 10:18 a.m.