Design Store


Looking for more design examples? Find them here.
              
    


 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendor
  Agilex Mailbox Client Intel FPGA IP Core Design Example(QSPI flash Access and Remote System Update)  Design ExampleAgilex F-Series Transceiver-SoC Development KitAgilex19.3.0 ProIntel
AN 486:SPI to I2C Using Altera MAX Series  Design Example \ Outside Design StoreNon Kit Specific MAX 10 Design ExamplesMAX 1014.0.0 Intel
Avalon-MM to Software Programmable SPI Master  Design Example \ Outside Design StoreStratix V GX FPGA Development Kit Stratix V13.0 Intel
  Cyclone 10 LP SPI Slave to Avalon Master Bridge Design Example  Design ExampleCyclone 10 LP FPGA Evaluation KitCyclone 10 LP17.0.0 StandardIntel
  GPIO, QSPI Flash, UART, ADC, LEDs, Switches Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1015.0.0 Intel
  GPIO, QSPI Flash, UART, ADC, LEDs, Switches Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1015.1.0 Intel
  GPIO, QSPI Flash, UART, ADC, LEDs, Switches Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0 Intel
  GPIO, QSPI Flash, UART, ADC, LEDs, Switches Design Example  Design ExampleMAX 10 FPGA Development KitMAX 1017.0.0 StandardIntel
HiSPi (High-Speed Pixel Interface) Imager Connectivity Design Example  Design Example \ Outside Design StoreCyclone V E FPGA Development Kit Cyclone V12.0sp1 Intel
HiSPi (High-Speed Pixel Interface) Imager Connectivity Design Example  Design Example \ Outside Design StoreCyclone V E FPGA Development Kit Cyclone V12.1 Intel
HiSPi Imager Connectivity Design Example   Design Example \ Outside Design StoreCyclone V GT FPGA Development KitCyclone V12.1 Intel
How to debug HPS SPI using SignalTapII  Design Example \ Outside Design StoreCyclone V SoC Development KitCyclone V15.0 Intel
  MAX10 10M50 Development Kit GHRD with Nios II/DDR3/QSPI Flash/Ethernet/mSGDMA/UART/ADC with Linux  Design ExampleMAX 10 FPGA Development KitMAX 1015.1.0 Intel
  MAX10 10M50 Development Kit GHRD with Nios II/DDR3/QSPI Flash/Ethernet/mSGDMA/UART/ADC with Linux  Design Example \ Linux Outside Design StoreMAX 10 FPGA Development KitMAX 1016.0.0 Intel
  MAX10 Development Kit GHRD with Nios II/DDR3/QSPI Flash/Ethernet/mSGDMA/UART with Linux  Design ExampleMAX 10 FPGA Development KitMAX 1015.0.0 Intel
QSPI XIP Design Example  Design ExampleCyclone V SoC Development KitCyclone V16.1 Intel
  QSPI XIP reference design  Design ExampleCyclone V SoC Development KitCyclone V15.0.0 Intel
  SPI Slave to 6 UART Master  Design ExampleMAX 10 FPGA 10M08 Evaluation KitMAX 1016.0.0 Intel
  SPI Slave to Avalon Master Bridge  Design ExampleOdyssey MAX 10 FPGA KitMAX 1015.0.0 Macnica Americas
  SPI Slave to Avalon Master Bridge  Design ExampleOdyssey MAX 10 FPGA KitMAX 1015.1.0 Macnica Americas