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 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendor
Using NicheStack TCP/IP Stack - Nios II Edition - Stratix IV GX FPGA Development Kit  Design Example \ Outside Design StoreStratix IV GX FPGA Development KitStratix IV12.0 Intel
  Accelerated Nios II/e Embedded System  Design ExampleCyclone 10 LP FPGA Evaluation KitCyclone 10 LP17.0.0 StandardSynaptic Laboratories Ltd.
  Accelerated Nios II/e Tiny Embedded System  Design ExampleNon Kit Specific MAX 10 Design ExamplesMAX 1017.0.0 StandardSynaptic Laboratories Ltd.
  ADC Data Capture with Nios II Processor  Design ExampleArrow MAX 10 DECAMAX 1015.0.0 Arrow
  ADC Data Capture with Nios II Processor  Design ExampleArrow MAX 10 DECAMAX 1015.1.0 Arrow
  ADC Data Capture with Nios II Processor  Design ExampleArrow MAX 10 DECAMAX 1016.0.0 Arrow
AN 458: Alternative Nios II Boot Methods  Design Example \ Outside Design StoreNios II Embedded Evaluation Kit (NEEK), Cyclone III EditionCyclone III14.0.0 Intel
AN 458: Alternative Nios II Boot Methods for Cyclone V GT FPGA  Design Example \ Outside Design StoreCyclone V GT FPGA Development KitCyclone V14.0.0 Intel
AN 458: Alternative Nios II Boot Methods for Embedded Systems Cyclone III Edition  Design Example \ Outside Design Store Altera Embedded Systems Development Kit, Cyclone III EditionCyclone III14.0.0 Intel
AN 458: Alternative Nios II Boot Methods for Stratix IV GX FPGA  Design Example \ Outside Design StoreStratix IV GX FPGA Development KitStratix IV14.0.0 Intel
AN 717: Nios II Gen2 Hardware Development Tutorial for Arria V  Design Example \ Outside Design StoreNon kit specific Arria V Design ExamplesArria V14.0.0 Intel
AN 717: Nios II Gen2 Hardware Development Tutorial for Cyclone V  Design Example \ Outside Design StoreNon kit specific Cyclone V Design ExamplesCyclone V14.0.0 Intel
AN 717: Nios II Gen2 Hardware Development Tutorial for MAX 10 NEEK  Design Example \ Outside Design StoreMAX 10 NEEKMAX 1014.0.0 Intel
AN 717: Nios II Gen2 Hardware Development Tutorial for Stratix V  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V14.0.0 Intel
AN 729: Implementing JESD204B IP Core System Reference Design with Nios II Processor As Control Unit  Design ExampleArria 10 GX FPGA Development KitArria 1015.0.0 Intel
AN741: Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor  Design Example \ Outside Design StoreMAX 10 FPGA Development KitMAX 1015.0.0 Intel
  Arria 10 Nios II Simple Socket Server Design Example  Design ExampleArria 10 SoC Development KitArria 1017.1.0 ProIntel
  Arria 10 two x8 Lanes JESD204B (Duplex) IP Cores Multi-Device Synchronization Reference Design using Nios II Processor  Design ExampleArria 10 GX FPGA Development KitArria 1016.1.2 Intel
  Arria 10 two x8 Lanes JESD204B (Duplex) IP Cores Multi-Device Synchronization Reference Design using Nios II Processor  Design ExampleArria 10 GX FPGA Development KitArria 1017.0.0 ProIntel
  Arria 10 two x8 Lanes JESD204B (Duplex) IP Cores Multi-Device Synchronization Reference Design using Nios II Processor  Design ExampleArria 10 GX FPGA Development KitArria 1017.0.0 StandardIntel