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 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendorDownloads
AN 518: SGMII Interface Implementation Using Soft-CDR Mode of Altera FPGAs - Stratix III  Design Example \ Outside Design StoreNon Kit Specific Stratix III Design ExamplesStratix III13.0 Intel2
AN 518: SGMII Interface Implementation Using Soft-CDR Mode of Altera FPGAs - Stratix IV  Design Example \ Outside Design StoreNon Kit Specific Stratix IV Design ExamplesStratix IV13.0 Intel0
AN 518: SGMII Interface Implementation Using Soft-CDR Mode of Altera FPGAs - Stratix V  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V13.0 Intel1
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families  Design Example \ Outside Design StoreNon kit specific Cyclone IV Design ExamplesCyclone IV15.0.0 Intel21
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families  Design Example \ Outside Design StoreNon kit specific Cyclone IV Design ExamplesCyclone IV13.1.4 Intel12
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Arria 10  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1015.0.0 Intel18
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Arria V  Design Example \ Outside Design StoreNon kit specific Arria V Design ExamplesArria V15.0.0 Intel6
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Cyclone III  Design Example \ Outside Design StoreNon kit specific Cyclone III Design ExamplesCyclone III15.0.0 Intel0
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Cyclone V  Design Example \ Outside Design StoreNon kit specific Cyclone V Design ExamplesCyclone V15.0.0 Intel27
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Stratix III  Design Example \ Outside Design StoreNon Kit Specific Stratix III Design ExamplesStratix III15.0.0 Intel1
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Stratix IV  Design Example \ Outside Design StoreNon Kit Specific Stratix IV Design ExamplesStratix IV15.0.0 Intel2
AN 522: Implementing Bus LVDS Interface in Supported Altera Device Families - Stratix V  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V15.0.0 Intel4
AN 558: Implementing Dynamic Reconfiguration in Arria II Devices  Design Example \ Outside Design StoreNon kit specific Arria II Design ExamplesArria II15.0.0 Intel1
AN 603: Active Serial Remote System Upgrade Reference Design  Design Example \ Outside Design StoreNon Kit Specific Stratix IV Design ExamplesStratix IV9.1 Intel7
AN 603: Active Serial Remote System Upgrade Reference Design - Arria II  Design ExampleArria II GX Development KitArria II9.1 Intel0
AN 603: Active Serial Remote System Upgrade Reference Design - Stratix III  Design Example \ Outside Design StoreNon Kit Specific Stratix III Design ExamplesStratix III9.1 Intel2
AN 609: Implementing Dynamic Reconfiguration in Cyclone IV GX Devices  Design Example \ Outside Design StoreCyclone IV GX Transceiver Development KitCyclone IV13.0 Intel6
AN 630: Real-Time ISP and ISP Clamp for Altera MAX Series  Design Example \ Outside Design StoreNon Kit Specific MAX 10 Design ExamplesMAX 1014.0.0 Intel8
AN 674: PROFINET IRT and Getting Started with The Siemens CPU 315 PLC  Design Example \ Outside Design StoreAltera DE2-115 Development and Education BoardCyclone IV13.0 Intel8
AN 676: Using the Transceiver Reconfiguration Controller for Dynamic Reconfiguration in Arria V and Cyclone V Devices  Design Example \ Outside Design StoreNon kit specific Cyclone V Design ExamplesCyclone V15.0.0 Intel5