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 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendorDownloads
Altera Interlaken IP Throughput Measurement  Design Example \ Outside Design StoreStratix V GX FPGA Development Kit Stratix V11.1 Intel0
  Altera PHYLite for Parallel Interfaces Loopback Simulation Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1015.1.0 Intel48
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1016.1.0 Intel63
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1015.1.0 Intel8
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel44
Altera Triple-Speed Ethernet Timing Contraints Design Example (Multi-core)  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V12.0 Intel10
Altera Video and Image Processing Suite Demo on VEEK Display - Camera Demo  Design Example \ Outside Design StoreDE2i-150 FPGA Development KitCyclone IV10.1 Terasic30
Altera Video and Image Processing Suite Demo on VEEK Display - VIP Demo  Design Example \ Outside Design StoreDE2i-150 FPGA Development KitCyclone IV10.1 Terasic11
Altera Video and Image Processing Suite Demo on VEEK Display - VIP Multi-Feed Demo  Design Example \ Outside Design StoreDE2i-150 FPGA Development KitCyclone IV10.1 Terasic8
Altera Video and Image Processing Suite Demo on VEEK Display- VIP PIP Demo  Design Example \ Outside Design StoreDE2i-150 FPGA Development KitCyclone IV10.1 Terasic8
Altera's Video and Image Processing on LCD Display  Design Example \ Outside Design StoreCyclone III FPGA Development KitCyclone III9.1 Intel16
  Altera-Lime Connectivity and DUC/DDC Design Example  Design ExampleLime Microsystems Stream BoardCyclone IV14.1.0 Intel21
  Altera-Lime Connectivity and DUC/DDC Design Example  Design ExampleLime Microsystems Stream BoardCyclone IV15.0.0 Intel29
Alternative Nios II Boot Methods on Embedded System, Cyclone III Design Example  Design Example \ Outside Design Store Altera Embedded Systems Development Kit, Cyclone III EditionCyclone III11.0 Intel5
Alternative Nios II Boot Methods on NEEK Cyclone III Design Example  Design Example \ Outside Design StoreNios II Embedded Evaluation Kit (NEEK), Cyclone III EditionCyclone III11.0 Intel1
Alternative Nios II Boot Methods on Stratix IV Design Example  Design Example \ Outside Design StoreStratix IV GX FPGA Development KitStratix IV11.0 Intel0
AN 307: Altera Design Flow for Xilinx Users  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V12.1 Intel5
AN 307: Altera Design Flow for Xilinx Users - Arria 10  Design Example \ Outside Design StoreNon kit specific Arria 10 Design ExamplesArria 1012.1 Intel11
AN 307: Altera Design Flow for Xilinx Users - Arria V  Design Example \ Outside Design StoreNon kit specific Arria V Design ExamplesArria V12.1 Intel1
AN 307: Altera Design Flow for Xilinx Users - Cyclone IV  Design Example \ Outside Design StoreNon kit specific Cyclone IV Design ExamplesCyclone IV12.1 Intel8