Design Store


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 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendor
Gen2x4 AVMM DMA - Cyclone V  Design Example \ Outside Design StoreCyclone V GT FPGA Development KitCyclone V14.0.0 Intel
Implementing OFDM Modulation and Demodulation  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V7.2 Intel
JPEG Decoder Design Example (OpenCL)  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V15.1.0 Intel
JPEG Decoder Design Example (OpenCL)  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V16.0.0 Intel
Polyphase Modulation With Aliasing for Data Up-Conversion  Design Example \ Outside Design StoreNon kit specific Cyclone III Design ExamplesCyclone III7.2 Intel
Using NicheStack TCP/IP Stack - Nios II Edition - Stratix IV GX FPGA Development Kit  Design Example \ Outside Design StoreStratix IV GX FPGA Development KitStratix IV12.0 Intel
10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demonstration Reference Design  Design Example \ Outside Design StoreNon Kit Specific Stratix IV Design ExamplesStratix IV12.0 Intel
100Gbps Ethernet 10x10 MAC PHY IP CFP Hardware Demo Design  Design Example \ Outside Design StoreStratix V GX 100G Development KitStratix V15.0 Intel
100Gbps Ethernet CAUI-4 CFP2 Hardware Demo Design  Design Example \ Outside Design StoreStratix V GX 100G Development KitStratix V13.0 Intel
100Gbps Ethernet PHY only Testbench  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V16.0.2 Intel
  12G-SDI Audio Reference Design  Design ExampleArria 10 SoC Development KitArria 1020.1.0 ProIntel
1G/10GbE and 10GBASE-KR PHY Design Specifications  Design Example \ Outside Design StoreArria 10 GX FPGA Development KitArria 1015.1 Intel
1G/2.5G Ethernet Design Example for Arria V Devices  Design Example \ Outside Design StoreArria V GT Development KitArria V15.1 Intel
  1G/2.5G Ethernet Design Example for Intel Stratix 10 Devices  Design ExampleStratix 10 Transceiver Signal Integrity Development KitStratix 1017.1.0 ProIntel
40G Base-KR4 Ethernet Hardware Demo  Design Example \ Outside Design StoreStratix V GT Transceiver Signal Integrity Development KitStratix V13.1 Intel
  40Gbps Ethernet MACPHY IP Hardware Demo Design using QSFP   Design ExampleStratix V GX FPGA Development Kit Stratix V17.1.0 StandardIntel
40Gbps Ethernet MACPHY IP Pause Control Demo Design  Design Example \ Outside Design StoreStratix V GX 100G Development KitStratix V13.0 Intel
40Gbps Ethernet MACPHY IP Reference Design  Design Example \ Outside Design StoreStratix V GX 100G Development KitStratix V12.1 Intel
  Accelerated FIR with Built-In Direct Memory Access Example  Design ExampleCyclone V E FPGA Development Kit Cyclone V15.0.0 Intel
  Accelerated FIR with Built-In Direct Memory Access Example  Design ExampleCyclone V E FPGA Development Kit Cyclone V15.1.0 Intel