Design Store

Looking for more design examples? Find them here. Interested in contributing content to the design store? Click here.
     
 
 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendorDownloads
JPEG Decoder Design Example (OpenCL)  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V16.0.0 Intel141
100Gbps Ethernet PHY only Testbench  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V16.0.2 Intel54
  Accelerated FIR with Built-In Direct Memory Access Example  Design ExampleCyclone V E FPGA Development Kit Cyclone V16.0.0 Intel237
  Adapting Digilent PmodCLP LCD Display to DE10 Lite Development Kit Arduino Shield Header  Design ExampleMAX 10 DE10 - LiteMAX 1016.0.0 Intel171
  ADC and Audio Monitor  Design ExampleOdyssey MAX 10 FPGA KitMAX 1016.0.0 Macnica Americas233
  ADC Data Capture with Hardware Streaming using ADC Toolkit Display  Design ExampleArrow MAX 10 DECAMAX 1016.0.0 Arrow197
  ADC Data Capture with Nios II Processor  Design ExampleArrow MAX 10 DECAMAX 1016.0.0 Arrow282
  ADC example for use with Board Test System Monitor Panel  Design ExampleMAX 10 FPGA Development KitMAX 1016.0.0 Intel264
  ADC_MIC_LCD  Design ExampleMAX 10 NEEKMAX 1016.0.0 Terasic106
  Altera PHYLite with Dynamic Reconfiguration Loopback Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel67
AN 680: Product Security Features for Altera Devices  Design Example \ Outside Design StoreNon kit specific Cyclone V Design ExamplesCyclone V16.0.0 Intel35
AN 680: Product Security Features for Altera Devices - Arria II  Design Example \ Outside Design StoreNon kit specific Arria II Design ExamplesArria II16.0.0 Intel7
AN 680: Product Security Features for Altera Devices - Arria V  Design Example \ Outside Design StoreNon kit specific Arria V Design ExamplesArria V16.0.0 Intel18
AN 680: Product Security Features for Altera Devices - Stratix V  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V16.0.0 Intel18
  AN690: PCIe Gen3x8 AVMM DMA with On-Chip Memory  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.2 Intel95
  AN708: PCIe Gen3x8 AVMM DMA with External Memory  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.2 Intel103
  Arria 10 Configuration via PCIe Init reference design  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel94
  Arria 10 DisplayPort 4KP60 with Video and Image Processing Pipeline Re-Transmit Reference Design  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel115
  Arria 10 FPGA Dev Kit Baseline Pinout  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel56
  Arria 10 FPGA Dev Kit ES2 Baseline Design  Design ExampleArria 10 GX FPGA Development KitArria 1016.0.0 Intel28