| Gen2x4 AVMM DMA - Cyclone V | Design Example \ Outside Design Store | Cyclone V GT FPGA Development Kit | Cyclone V | 14.0.0 | Intel |
| Implementing OFDM Modulation and Demodulation | Design Example \ Outside Design Store | Non kit specific Stratix V Design Examples | Stratix V | 7.2 | Intel |
| JPEG Decoder Design Example (OpenCL) | Design Example \ Outside Design Store | Non kit specific Stratix V Design Examples | Stratix V | 15.1.0 | Intel |
| JPEG Decoder Design Example (OpenCL) | Design Example \ Outside Design Store | Non kit specific Stratix V Design Examples | Stratix V | 16.0.0 | Intel |
| Nios II Custom Instruction Design Example - Nios II Embedded Evaluation Kit, Cyclone III Edition | Design Example \ Outside Design Store | Nios II Embedded Evaluation Kit (NEEK), Cyclone III Edition | Cyclone III | 11.0 | Intel |
| Nios II Custom Instruction Design Example - Stratix IV GX FPGA Development Kit | Design Example \ Outside Design Store | Stratix IV GX FPGA Development Kit | Stratix IV | 11.0 | Intel |
| Polyphase Modulation With Aliasing for Data Up-Conversion | Design Example \ Outside Design Store | Non kit specific Cyclone III Design Examples | Cyclone III | 7.2 | Intel |
| Profiling Nios II Systems Design Example - Embedded Systems Development Edition, Cyclone III Edition | Design Example \ Outside Design Store | Altera Embedded Systems Development Kit, Cyclone III Edition | Cyclone III | 11.0 | Intel |
| Profiling Nios II Systems Design Example, Stratix IV GX FPGA Development Kit | Design Example \ Outside Design Store | Stratix IV GX FPGA Development Kit | Stratix IV | 11.0 | Intel |
| Using NicheStack TCP/IP Stack - Nios II Edition - Stratix IV GX FPGA Development Kit | Design Example \ Outside Design Store | Stratix IV GX FPGA Development Kit | Stratix IV | 12.0 | Intel |
| 10-Gbps Ethernet Hardware Demonstration Reference Design | Design Example \ Outside Design Store | Stratix IV GX FPGA Development Kit | Stratix IV | 11.0 | Intel |
| 10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demonstration Reference Design | Design Example \ Outside Design Store | Non Kit Specific Stratix IV Design Examples | Stratix IV | 12.0 | Intel |
| 100Gbps Ethernet 10x10 MAC PHY IP CFP Hardware Demo Design | Design Example \ Outside Design Store | Stratix V GX 100G Development Kit | Stratix V | 15.0 | Intel |
| 100Gbps Ethernet CAUI-4 CFP2 Hardware Demo Design | Design Example \ Outside Design Store | Stratix V GX 100G Development Kit | Stratix V | 13.0 | Intel |
| 100Gbps Ethernet PHY only Testbench | Design Example \ Outside Design Store | Non kit specific Stratix V Design Examples | Stratix V | 16.0.2 | Intel |
| 10G Ethernet and 10G Base R PHY Interoperability Hardware Demonstration Design | Design Example \ Outside Design Store | Stratix IV GT 100G Development Kit | Stratix IV | 11.0 | Intel |
| 10GBase-R (Stratix V GX) | Design Example \ Outside Design Store | Stratix V GX FPGA Development Kit | Stratix V | 11.0 | Intel |
| 1G/10GbE and 10GBASE-KR PHY Design Specifications | Design Example \ Outside Design Store | Arria 10 GX FPGA Development Kit | Arria 10 | 15.1 | Intel |
| 1G/2.5G Ethernet Design Example for Arria V Devices | Design Example \ Outside Design Store | Arria V GT Development Kit | Arria V | 15.1 | Intel |
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| 1G/2.5G Ethernet Design Example for Intel Stratix 10 Devices | Design Example | Stratix 10 Transceiver Signal Integrity Development Kit | Stratix 10 | 17.1.0 Pro | Intel |
