| Avalon Memory-Mapped Master Templates | Design Example \ Outside Design Store | Non Kit Specific Stratix IV Design Examples | Stratix IV | 8.0 | Intel |
| Gen2x4 AVMM DMA - Cyclone V | Design Example \ Outside Design Store | Cyclone V GT FPGA Development Kit | Cyclone V | 14.0.0 | Intel |
| Implementing OFDM Modulation and Demodulation | Design Example \ Outside Design Store | Non kit specific Stratix V Design Examples | Stratix V | 7.2 | Intel |
| JPEG Decoder Design Example (OpenCL) | Design Example \ Outside Design Store | Non kit specific Stratix V Design Examples | Stratix V | 15.1.0 | Intel |
| JPEG Decoder Design Example (OpenCL) | Design Example \ Outside Design Store | Non kit specific Stratix V Design Examples | Stratix V | 16.0.0 | Intel |
| Nios II 3C120 Microprocessor System with LCD Controller | Design Example \ Outside Design Store | Altera Embedded Systems Development Kit, Cyclone III Edition | Cyclone III | 8.0 | Intel |
| Nios II 3C25 Microprocessor System with LCD Controller | Design Example \ Outside Design Store | Nios II Embedded Evaluation Kit (NEEK), Cyclone III Edition | Cyclone III | 8.1 | Intel |
| Nios II Custom Instruction Design Example - Nios II Embedded Evaluation Kit, Cyclone III Edition | Design Example \ Outside Design Store | Nios II Embedded Evaluation Kit (NEEK), Cyclone III Edition | Cyclone III | 11.0 | Intel |
| Nios II Custom Instruction Design Example - Stratix IV GX FPGA Development Kit | Design Example \ Outside Design Store | Stratix IV GX FPGA Development Kit | Stratix IV | 11.0 | Intel |
| Nios II Low-Power Design Example - Nios II Embedded Evaluation Kit, Cyclone III Edition | Design Example \ Outside Design Store | Nios II Embedded Evaluation Kit (NEEK), Cyclone III Edition | Cyclone III | 8.0 | Intel |
| Polyphase Modulation With Aliasing for Data Up-Conversion | Design Example \ Outside Design Store | Non kit specific Cyclone III Design Examples | Cyclone III | 7.2 | Intel |
| Profiling Nios II Systems Design Example - Embedded Systems Development Edition, Cyclone III Edition | Design Example \ Outside Design Store | Altera Embedded Systems Development Kit, Cyclone III Edition | Cyclone III | 11.0 | Intel |
| Profiling Nios II Systems Design Example, Stratix IV GX FPGA Development Kit | Design Example \ Outside Design Store | Stratix IV GX FPGA Development Kit | Stratix IV | 11.0 | Intel |
| TSE: Implement Reset Sequence in TSE Using ALTGX as Transceiver | Design Example \ Outside Design Store | Non Kit Specific Stratix IV Design Examples | Stratix IV | 8.1 | Intel |
| Using NicheStack TCP/IP Stack - Nios II Edition - Stratix IV GX FPGA Development Kit | Design Example \ Outside Design Store | Stratix IV GX FPGA Development Kit | Stratix IV | 12.0 | Intel |
| 10-Gbps Ethernet Hardware Demonstration Reference Design | Design Example \ Outside Design Store | Stratix IV GX FPGA Development Kit | Stratix IV | 11.0 | Intel |
| 10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demonstration Reference Design | Design Example \ Outside Design Store | Non Kit Specific Stratix IV Design Examples | Stratix IV | 12.0 | Intel |
| 100Gbps Ethernet 10x10 MAC PHY IP CFP Hardware Demo Design | Design Example \ Outside Design Store | Stratix V GX 100G Development Kit | Stratix V | 15.0 | Intel |
| 100Gbps Ethernet CAUI-4 CFP2 Hardware Demo Design | Design Example \ Outside Design Store | Stratix V GX 100G Development Kit | Stratix V | 13.0 | Intel |
| 100Gbps Ethernet PHY only Testbench | Design Example \ Outside Design Store | Non kit specific Stratix V Design Examples | Stratix V | 16.0.2 | Intel |
