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 NameCategoryDevelopment KitFamilyQuartus Prime VersionVendor
Avalon Memory-Mapped Master Templates  Design Example \ Outside Design StoreNon Kit Specific Stratix IV Design ExamplesStratix IV8.0 Intel
Gen2x4 AVMM DMA - Cyclone V  Design Example \ Outside Design StoreCyclone V GT FPGA Development KitCyclone V14.0.0 Intel
Implementing OFDM Modulation and Demodulation  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V7.2 Intel
JPEG Decoder Design Example (OpenCL)  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V15.1.0 Intel
JPEG Decoder Design Example (OpenCL)  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V16.0.0 Intel
Nios II 3C120 Microprocessor System with LCD Controller  Design Example \ Outside Design Store Altera Embedded Systems Development Kit, Cyclone III EditionCyclone III8.0 Intel
Nios II 3C25 Microprocessor System with LCD Controller  Design Example \ Outside Design StoreNios II Embedded Evaluation Kit (NEEK), Cyclone III EditionCyclone III8.1 Intel
Nios II Custom Instruction Design Example - Nios II Embedded Evaluation Kit, Cyclone III Edition  Design Example \ Outside Design StoreNios II Embedded Evaluation Kit (NEEK), Cyclone III EditionCyclone III11.0 Intel
Nios II Custom Instruction Design Example - Stratix IV GX FPGA Development Kit  Design Example \ Outside Design StoreStratix IV GX FPGA Development KitStratix IV11.0 Intel
Nios II Low-Power Design Example - Nios II Embedded Evaluation Kit, Cyclone III Edition  Design Example \ Outside Design StoreNios II Embedded Evaluation Kit (NEEK), Cyclone III EditionCyclone III8.0 Intel
Polyphase Modulation With Aliasing for Data Up-Conversion  Design Example \ Outside Design StoreNon kit specific Cyclone III Design ExamplesCyclone III7.2 Intel
Profiling Nios II Systems Design Example - Embedded Systems Development Edition, Cyclone III Edition  Design Example \ Outside Design Store Altera Embedded Systems Development Kit, Cyclone III EditionCyclone III11.0 Intel
Profiling Nios II Systems Design Example, Stratix IV GX FPGA Development Kit  Design Example \ Outside Design StoreStratix IV GX FPGA Development KitStratix IV11.0 Intel
TSE: Implement Reset Sequence in TSE Using ALTGX as Transceiver  Design Example \ Outside Design StoreNon Kit Specific Stratix IV Design ExamplesStratix IV8.1 Intel
Using NicheStack TCP/IP Stack - Nios II Edition - Stratix IV GX FPGA Development Kit  Design Example \ Outside Design StoreStratix IV GX FPGA Development KitStratix IV12.0 Intel
10-Gbps Ethernet Hardware Demonstration Reference Design  Design Example \ Outside Design StoreStratix IV GX FPGA Development KitStratix IV11.0 Intel
10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demonstration Reference Design  Design Example \ Outside Design StoreNon Kit Specific Stratix IV Design ExamplesStratix IV12.0 Intel
100Gbps Ethernet 10x10 MAC PHY IP CFP Hardware Demo Design  Design Example \ Outside Design StoreStratix V GX 100G Development KitStratix V15.0 Intel
100Gbps Ethernet CAUI-4 CFP2 Hardware Demo Design  Design Example \ Outside Design StoreStratix V GX 100G Development KitStratix V13.0 Intel
100Gbps Ethernet PHY only Testbench  Design Example \ Outside Design StoreNon kit specific Stratix V Design ExamplesStratix V16.0.2 Intel